8-bit buffer/line drive r cy74fct2541t sccs041 - september 1994 - revised march 2000 data sheet acquired from cypress semiconductor corporation. data sheet modi?ed to remove devices not offered. copyright ? 2000, texas instruments incorporated features ? function and pinout compatible with fct and f logic ? fct-c speed at 4.1 ns max. fct-a speed at 4.8 ns max. ? 25 w output series to reduce transmission line re?ection noise ? reduced v oh (typically = 3.3v) versions of equivalent fct functions ? edge-rate control circuitry for signi?cantly improved noise characteristics ? power-off disable feature ? esd > 2000v ? matched rise and fall times ? fully compatible with ttl input and output logic levels ? sink current 12 ma source current 15 ma ? extended commercial temp. range of C40?c to +85?c ? three-state outputs functional description the fct2541t is an octal buffer and line driver designed to be employed as a memory address driver, clock driver, and bus-oriented transmitter/receiver. on-chip termination resistors have been added to the outputs to reduce system noise caused by reflections. the fct2541t can be used to replace the fct541t to reduce noise in an existing design. the speed of the fct2541t is comparable to bipolar logic counterparts while reducing power dis- sipation. the input and output voltage levels allow direct interface with ttl and cmos devices without external components. the outputs are designed with a power-off disable feature to allow for live insertion of boards. ] logic block diagram pin configurations 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 13 14 v cc fct2541tC2 15 soic/qsop top view gnd fct2541t C3 o 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 oe b oe a o 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 oe b oe a function table [1] inputs output oe a oe b d l l h l l h l h x l h z note: 1. h = high voltage level l = low voltage level x = dont care z = high impedance
cy74fct2541t 2 maximum ratings [2,3] (above which the useful life may be impaired. for user guide- lines, not tested.) storage temperature ..................................... - 65 c to +150 c ambient temperature with power applied .................................................. - 65 c to +135 c supply voltage to ground potential ..................- 0.5v to +7.0v dc input voltage .................................................- 0.5v to +7.0v dc output voltage ..............................................- 0.5v to +7.0v dc output current (maximum sink current/pin) ...... 120 ma power dissipation .......................................................... 0.5w static discharge voltage............................................>2001v (per mil-std-883, method 3015) operating range range ambient temperature v cc commercial - 40 c to +85 c 5v 5% electrical characteristics over the operating range parameter description test conditions min. typ. [5] max. unit v oh output high voltage v cc = min., i oh = - 15 ma 2.4 3.3 v v ol output low voltage v cc = min., i ol = 12 ma 0.3 0.55 v r out output resistance v cc = min., i ol = 12 ma 20 25 40 w v ih input high voltage 2.0 v v il input low voltage 0.8 v v h hysteresis [6] all inputs 0.2 v v ik input clamp diode voltage v cc = min., i in = - 18 ma - 0.7 - 1.2 v i i input high current v cc = max., v in = v cc 5 m a i ih input high current v cc = max., v in = 2.7v 1 m a i il input low current v cc = max., v in = 0.5v 1 m a i ozh off state high-level output current v cc = max., v out = 2.7v 15 m a i ozl off state low-level output current v cc = max., v out = 0.5v - 15 m a i os output short circuit current [7] v cc = max., v out = 0.0v - 60 - 120 - 225 ma i off power-off disable v cc = 0v, v out = 4.5v 1 m a capacitance [6] parameter description typ. [5] max. unit c in input capacitance 5 10 pf c out output capacitance 9 12 pf notes: 2. unless otherwise noted, these limits are over the operating free-air temperature range. 3. unused inputs must always be connected to an appropriate logic voltage level, preferably either v cc or ground. 4. t a is the instant on case temperature. 5. typical values are at v cc =5.0v, t a =+25?c ambient. 6. this parameter is speci?ed but not tested. 7. not more than one output should be shorted at a time. duration of short should not exceed one second. the use of high-speed test apparatus and/or sampl e and hold techniques are preferable in order to minimize internal chip heating and more accurately re?ect operational values. ot herwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. in any sequence of param eter tests, i os tests should be performed last.
cy74fct2541t 3 power supply characteristics parameter description test conditions typ. [5] max. unit i cc quiescent power supply current v cc =max., v in 0.2v, v in 3 v cc - 0.2v 0.1 0.2 ma d i cc quiescent power supply current (ttl inputs) v cc =max., v in =3.4v, [8] f 1 =0, outputs open 0.5 2.0 ma i ccd dynamic power supply current [9] v cc =max., 50% duty cycle, outputs open, one bit toggling, oe a = oe b =gnd, v in 0.2v or v in 3 v cc - 0.2v 0.06 0.12 ma/ mhz i c total power supply current [10] v cc =max., 50% duty cycle, outputs open, one bit toggling at f 1 =10 mhz, oe a = oe b =gnd, v in 0.2v or v in 3 v cc - 0.2v 0.7 1.4 ma v cc =max., 50% duty cycle, outputs open, one bit toggling at f 1 =10 mhz, oe a = oe b =gnd, v in =3.4v or v in =gnd 1.0 2.4 ma v cc =max., 50% duty cycle, outputs open, eight bits toggling at f 1 =2.5 mhz, oe a = oe b =gnd, v in 0.2v or v in 3 v cc - 0.2v 1.3 2.6 [11] ma v cc =max., 50% duty cycle, outputs open, eight bits toggling at f 1 =2.5 mhz, oe a = oe b =gnd, v in =3.4v or v in =gnd 3.3 10.6 [11] ma switching characteristics over the operating range [12] parameter description cy74fct2541t cy74fct2541at cy74fct2541at unit fig. no. [13] min. max. min. max. min. max. t plh t phl propagation delay data to output 1.5 8.0 1.5 4.8 1.5 4.1 ns 1, 3 t pzh t pzl output enable time 1.5 10.0 1.5 6.2 1.5 5.8 ns 1, 7, 8 t phz t plz output disable time 1.5 9.5 1.5 5.6 1.5 5.2 ns 1, 7, 8 notes: 8. per ttl driven input (v in =3.4v); all other inputs at v cc or gnd. 9. this parameter is not directly testable, but is derived for use in total power supply calculations. 10. i c =i quiescent + i inputs + i dynamic i c =i cc + d i cc d h n t +i ccd (f 0 /2 + f 1 n 1 ) i cc = quiescent current with cmos input levels d i cc = power supply current for a ttl high input (v in =3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f 0 = clock frequency for registered devices, otherwise zero f 1 = input signal frequency n 1 = number of inputs changing at f 1 all currents are in milliamps and all frequencies are in megahertz. 11. values for these conditions are examples of the i cc formula. these limits are speci?ed but not tested. 12. minimum limits are speci?ed but not tested on propagation delays. 13. see parameter measurement information in the general information section.
cy74fct2541t 4 ordering information speed (ns) ordering code package name package type operating range 4.1 cy74fct2541ctqct q5 20-lead (150-mil) qsop commercial cy74fct2541ctsoc/soct s5 20-lead (300-mil) molded soic 4.8 cy74fct2541atqct q5 20-lead (150-mil) qsop commercial cy74fct2541atsoc/soct s5 20-lead (300-mil) molded soic 8.0 cy74fct2541tqct q5 20-lead (150-mil) qsop commercial cy74fct2541tsoc/soct s5 20-lead (300-mil) molded soic document #: 38 - 00342 - a
cy74fct2541t 5 package diagrams 20-lead quarter size outline q5 20-lead (300-mil) molded soic s5
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. customers are responsible for their applications using ti components. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated
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